RISC-V on an FPGA, pt. 7

Today I’m going to try SiFive’s Freedom U500 64 bit RISC-V design on the very low-end $148 Arty Board. If you want more background into what SiFive are up to then I recommend watching this 15 minute video, but in brief they seem to be positioning themselves as a distributor and integrator of RISC-V.

The good thing is they compile everything you need including the Xilinx bitstream. The bad thing is that these are behind a registration wall with a poisonous license agreement (in particular, non-commercial use only). I hope this is only because of the bits of 3rd party proprietary IP they are using for ethernet, flash, UART, etc.

If you want to do this yourself, read the getting started guide here. Assuming you have Xilinx Vivado installed, following the instructions is completely straightforward except for one point: You need to do “Boot from Configuration Memory device” after programming. Anyway you will have a booting Linux/RISC-V in a few minutes.

screenshot-u500

After the cut, the boot output.

           SiFive RISC-V Coreplex
[    0.000000] Linux version 4.6.2-ga9474b8 (aou@i0.internal.sifive.com) (gcc version 6.1.0 (GCC) ) #3 Sun Jul 10 17:43:16 PDT 2016
[    0.000000] bootconsole [early0] enabled
[    0.000000] Available physical memory: 250MB
[    0.000000] Initial ramdisk at: 0xffffffff800140c0 (2182877 bytes)
[    0.000000] Zone ranges:
[    0.000000]   Normal   [mem 0x0000000080600000-0x000000008fffffff]
[    0.000000] Movable zone start for each node
[    0.000000] Early memory node ranges
[    0.000000]   node   0: [mem 0x0000000080600000-0x000000008fffffff]
[    0.000000] Initmem setup node 0 [mem 0x0000000080600000-0x000000008fffffff]
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 63125
[    0.000000] Kernel command line: earlyprintk 
[    0.000000] PID hash table entries: 1024 (order: 1, 8192 bytes)
[    0.000000] Dentry cache hash table entries: 32768 (order: 6, 262144 bytes)
[    0.000000] Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
[    0.000000] Sorting __ex_table...
[    0.000000] Memory: 246856K/256000K available (2187K kernel code, 113K rwdata, 416K rodata, 2216K init, 224K bss, 9144K reserved, 0K cma-reserved)
[    0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[    0.000000] NR_IRQS:0 nr_irqs:0 0
[    0.000000] clocksource: riscv_clocksource: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 1911260446275 ns
[    0.000000] Calibrating delay loop (skipped), value calculated using timer frequency.. 2.00 BogoMIPS (lpj=10000)
[    0.000000] pid_max: default: 32768 minimum: 301
[    0.010000] Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
[    0.010000] Mountpoint-cache hash table entries: 512 (order: 0, 4096 bytes)
[    0.050000] devtmpfs: initialized
[    0.070000] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
[    0.090000] NET: Registered protocol family 16
[    0.180000] clocksource: Switched to clocksource riscv_clocksource
[    0.220000] NET: Registered protocol family 2
[    0.230000] TCP established hash table entries: 2048 (order: 2, 16384 bytes)
[    0.240000] TCP bind hash table entries: 2048 (order: 2, 16384 bytes)
[    0.240000] TCP: Hash tables configured (established 2048 bind 2048)
[    0.250000] UDP hash table entries: 256 (order: 1, 8192 bytes)
[    0.250000] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes)
[    0.260000] NET: Registered protocol family 1
[    3.960000] Unpacking initramfs...
[    7.820000] console [sbi_console0] enabled
[    7.820000] console [sbi_console0] enabled
[    7.820000] bootconsole [early0] disabled
[    7.820000] bootconsole [early0] disabled
[    7.840000] futex hash table entries: 256 (order: 0, 6144 bytes)
[    7.850000] workingset: timestamp_bits=61 max_order=16 bucket_order=0
[    8.250000] io scheduler noop registered
[    8.260000] io scheduler cfq registered (default)
[    9.780000] gpio leds: loaded 4 GPIOs
[    9.870000] Freeing unused kernel memory: 2216K (ffffffff80000000 - ffffffff8022a000)
[    9.880000] This architecture does not have kernel memory protection.
Starting logging: OK
Starting network...

Welcome to Buildroot
sifive login: root
# cat /proc/cpuinfo 
hart    : 0
isa     : RV64G

# uname -a
Linux sifive 4.6.2-ga9474b8 #3 Sun Jul 10 17:43:16 PDT 2016 riscv GNU/Linux

1 Comment

Filed under Uncategorized

One response to “RISC-V on an FPGA, pt. 7

  1. Pingback: RISC-V on an FPGA, pt. 8 | Richard WM Jones

Leave a Reply

Fill in your details below or click an icon to log in:

WordPress.com Logo

You are commenting using your WordPress.com account. Log Out / Change )

Twitter picture

You are commenting using your Twitter account. Log Out / Change )

Facebook photo

You are commenting using your Facebook account. Log Out / Change )

Google+ photo

You are commenting using your Google+ account. Log Out / Change )

Connecting to %s