RISC-V on an FPGA, pt. 1

Last year I had open source instruction set RISC-V running Linux emulated in qemu. However to really get into the architecture, and restore my very rusty FPGA skills, wouldn’t it be fun to have RISC-V working in real hardware.

The world of RISC-V is pretty confusing for outsiders. There are a bunch of affiliated companies, researchers who are producing actual silicon (nothing you can buy of course), and the affiliated(?) lowRISC project which is trying to produce a fully open source chip. I’m starting with lowRISC since they have three iterations of a design that you can install on reasonably cheap FPGA development boards like the one above. (I’m going to try to install “Untether 0.2” which is the second iteration of their FPGA design.)

There are two FPGA development kits supported by lowRISC. They are the Xilinx Artix-7-based Nexys 4 DDR, pictured above, which I bought from Digi-Key for £261.54 (that price included tax and next day delivery from the US).

There is also the KC705, but that board is over £1,300.

The main differences are speed and available RAM. The Nexys has 128MB of RAM only, which is pretty tight to run Linux. The KC705 has 1GB of RAM.

I’m also going to look at the dev kits recommended by SiFive, which start at US$150 (also based on the Xilinx Artix-7).